(250) Supertex­ TP0104N8 P-Channel Enhancement-Mode Vertical DMOS FETs

Low threshold 2.4V max. High input impedance Low input capacitance Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Complementary N- and P-channel devices

These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * For TO-39 and TO-92, distance 1.6 mm from case for 10 seconds. 7-107 BVDSS BVDGS +150°C 300°C

Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time

Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested.